Compilers and Architectures for Digital Signal Processing

Abstract

The development of complex signal processing systems involves designing an architecture and compiler pair that is matched to the algorithms intended to be executed on the particular system. Because recent (and future) DSP algorithms have become more complex, analysis of existing DSP architectures and compilers provides compelling evidence that future systems will require new architectures and compilers to accomplish the signal processing applications. The key to an optimal design is analysis of the algorithms in the context of a signal processing compiler/architecture pair. This has ramifications in all areas of design, including architecture, software, circuits, and even the original algorithm. To develop efficient and cost-effective DSP systems, a team with expertise in each of these areas is required.

Before fabrication of an new architecture, the performance of the architecture must be carefully modeled by software. Because a new processor implementation may cost tens of millions of dollars to implement, we develop compilers and tools for an architecture prior to fabrication. We iterate through various architectural improvements, modify the compilers to optimize for these improvements, and characterize the performance of the improvements. This work results in signal processing systems that are very efficient for the intended application domain.

1. Develop Compilable Architectures for Digital Signal Processing (DSP) Systems
2. Develop DSP Architectures that Exploit Compiler Technology
   • Investigate arithmetic systems (e.g., fractional, integer, floating point, redundant, interval, etc.) and their applicability to DSP architectures
   • Develop arithmetic units for DSP architectures
   • Characterize the cost and performance trade-offs of proposed architectures
3. Research Instruction Level Parallelism (ILP) Compilers
   • Investigate the impact of various optimizations on DSP algorithms
   • Investigate optimizations that leverage architectural techniques (e.g., multiple instruction issue, predication, speculation, etc.)
   • Design optimizations appropriate for DSP algorithms (e.g., modulo scheduling, profiled compilation, hyperblock formation, etc.)
4. Research Algorithms and Methods of Parallelization
   • Design parallel algorithms for wireless speech transmission - particularly GSM and future standards
   • Evaluate performance characteristics
5. Research Circuit Techniques For Parallel Instruction Issue
   • Provide parallel extraction of saturating multiplication
   • Guarantee program executes in serial order while instructions issue in parallel
6. Establish a Team of Scientists and Engineers with Expertise in DSP Algorithms, Compilers, and Architectures
   • Provide mentoring, challenging research topics, and practical training for graduate students
   • Benefit from existing expertise at Lucent Technologies and Lehigh University

Publications